catfood/2020301918-os
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

lab5 report

Browse Source
This commit is contained in:
ridethepig 2022-11-04 12:33:43 +08:00
parent 9c17cfaecf
commit f13d09f336
2 changed files with 4 additions and 8 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

BIN
2020301918-李懋良-试点班第5个报告.docx Normal file
View File

Binary file not shown.

12
kern/main.c
View File

@ -41,7 +41,6 @@ init_segment_regs(PROCESS *p_proc)
static inline void static inline void
lml_map(phyaddr_t cr3, uintptr_t vaddr, phyaddr_t paddr, u32 flags) { lml_map(phyaddr_t cr3, uintptr_t vaddr, phyaddr_t paddr, u32 flags) {
uintptr_t *pde_ptr = (uintptr_t *)K_PHY2LIN(cr3); uintptr_t *pde_ptr = (uintptr_t *)K_PHY2LIN(cr3);
// pde_ptr += PDX(3 * GB); // get page table base addr
// get pdx item, pde_ptr + PDX(vaddr) // get pdx item, pde_ptr + PDX(vaddr)
pde_ptr += PDX(vaddr); pde_ptr += PDX(vaddr);
if (!(*pde_ptr & PTE_P)) { if (!(*pde_ptr & PTE_P)) {
@ -100,7 +99,8 @@ void kernel_main(void)
if (phdr->p_type == PT_LOAD) { if (phdr->p_type == PT_LOAD) {
u32 vpage_fst = phdr->p_va & (~0xfff); // clear low 12 bit, start of the first pg u32 vpage_fst = phdr->p_va & (~0xfff); // clear low 12 bit, start of the first pg
u32 vpage_lst = (phdr->p_va + phdr->p_memsz - 1) & (~0xfff); // start of the last pg u32 vpage_lst = (phdr->p_va + phdr->p_memsz - 1) & (~0xfff); // start of the last pg
// in fact, we allocate 4k aligned vpage to every segment; its ok because elf32 segment align is 0x1000 // in fact, we allocate 4k aligned vpage to every segment;
// its ok because elf32 segment align is 0x1000
u32 page_num = ((vpage_lst - vpage_fst) >> 12) + 1; u32 page_num = ((vpage_lst - vpage_fst) >> 12) + 1;
phyaddr_t newpage = 0; // useless initialization phyaddr_t newpage = 0; // useless initialization
for (int j = 0; j < page_num; ++ j) { for (int j = 0; j < page_num; ++ j) {
@ -123,12 +123,8 @@ void kernel_main(void)
for (int i = 0; i < 8; ++ i) { for (int i = 0; i < 8; ++ i) {
lml_map(p_proc->pcb.cr3, (3*GB - (8-i)*PGSIZE), ustack_low + i*PGSIZE, PTE_P | PTE_W | PTE_U); lml_map(p_proc->pcb.cr3, (3*GB - (8-i)*PGSIZE), ustack_low + i*PGSIZE, PTE_P | PTE_W | PTE_U);
} }
p_proc->pcb.user_regs.esp = 3*GB; p_proc->pcb.user_regs.esp = 3*GB; // high to low stack
// p_proc->pcb.user_regs.esp -= 4; p_proc->pcb.user_regs.eip = ehdr->e_entry; // refer to restart:
// uintptr_t* ustack_top = (uintptr_t*)K_PHY2LIN(ustack_high + PGSIZE);
// ustack_top --;
// *ustack_top = ehdr->e_entry;
p_proc->pcb.user_regs.eip = ehdr->e_entry;
// 初始化用户寄存器 // 初始化用户寄存器
p_proc->pcb.user_regs.eflags = 0x1202; /* IF=1, IOPL=1 */ p_proc->pcb.user_regs.eflags = 0x1202; /* IF=1, IOPL=1 */