OSTEP Chapter 20

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- virtualization, concurrency, and persistence
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- didactic 道德说教的;教诲的;
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- Cramming 填塞;填鸭式用功;考试前临时硬记
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- fond 喜爱(尤指认识已久的人);喜爱(尤指长期喜爱的事物)
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- the operating system as a virtual machine, standard library and resource manager
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- illusion 错觉,幻象
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- virtualizing the CPU: run many programs at the same time
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- virtualizing memory: each process accesses its own private virtual address space
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- intricate 错综复杂的
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- heyday 全盛时期
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- incredulous 不肯相信的;不能相信的;表示怀疑的
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- The definition of a process, informally, is quite simple: it is a running program
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- To implement virtualization of the CPU, low-level machinery and some high-level intelligence.
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- mechanisms are low-level methods or protocols that implement a needed piece of functionality
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- Policies are algorithms for making some kind of decision within the OS
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- inventory 库存;财产清单;
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- three states of a process: Running Ready Blocked
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- nitty-gritty 本质;事实真相;实质问题
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- KEY PROCESS TERMS
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- Interlude: Process API
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Syscall-fork, wait, exec
- Get it right. Neither abstraction nor simplicity is a substitute for getting it right
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- the separation of fork() and exec() is essential in shell, because it lets the shell <u>run code after the call to fork() but before the call to exec()</u>; this code can alter the environment of the about-to-be-run program
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- imperative 必要的,命令的;必要的事
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- control processes through signal subsystem
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- Limited Direct Execution: Direct execution is to simply run the program directly on the CPU.
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- aspiring 有追求的,有抱负的
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- user mode and kernel mode
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- In user mode, code is restricted in what it can do, otherwise the processor will raise an exception
- User code perform system call to do privileged operation.
- To execute a system call, use `trap` and `return-from-trap` instruction: jump to/from kernel and change the privilege level.
- Limited Direct Execution Protocol-interesting figure illustrating how system call is done
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- wary 谨慎的;考虑周到的
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- Switching Between Processes: how OS regain control of the CPU
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- Cooperative Approach: wait for a system call. 1. The processes are expected to give up the CPU periodically through system call `yield`(which does nothing except to transfer control to the OS). 2. The process does something that causes a trap
- Non-Cooperative Approach: timer interrupt.
- Context switch: save a few register values for the currently-executing process.
Two types of register saves/restores: TI, hardware save state to kernel stack; context switch, OS save kernel registers and restore everything to return from trap
- malfeasance 渎职;不正当行为
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- scoff 嘲笑;愚弄;笑柄
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- enact 制定(法律);通过(法案)
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- whet 引起,刺激(食欲、欲望、兴趣等)
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- analogous 相似的,可比拟的
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- workload assumptions: Each job, runs for the same amount of time, arrives at the same time, runs to completion, uses only CPU, and run-time is known
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- Quite unrealistic, but modern preemptive scheduling somewhat mimics part of these assumptions
- scheduling metric: turnaround time, aka `completion - arrival`
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- conundrum 谜,猜不透的难题,难答的问题
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- First In, First Out (FIFO/FCFS) algorithm
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- Bad average turnaround when long job runs first(The jobs run for **different amount of time**)
- Convoy effect: a number of relatively-short potential consumers of a resource get queued behind a heavyweight resource consumer
- Shortest Job First(SJF)
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- assuming that jobs all arriving at the same time, it could be proven that SJF is indeed an optimal scheduling algorithm
- Downgrade to the same problem of Convey Effect when jobs **don't arrive at the same time**. For example, short jobs arrive shortly after the long job.
- Shortest Time-to-Completion First (STCF)
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- Basically, it is SJF(by our definition is a non-preemptive scheduler) with **preemption**. When a new job enters the system, STCF schedules to the job with the least time left among all present jobs(including the new guy).
- Metric: Response Time. Defined as `resp = firstrun - arrival`. Compare to ((642cf48d-b312-4af1-a2ff-d55cf9f32e48))
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- For this metric, STCF is not that good.
- Round-Robin (RR)
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- Not run jobs to completion But run a job for a time slice and then Switch to the next job in the run queue. Repeat until the jobs are done
- Good for Response Time, bad for Turnaround Time.
- Length of time slice is critical, in theory the shorter the better performance under response time metric. However, cost of context switching will dominate overall performance. The cost of context switching comes not only from save/restore registers, but also from caches or something alike.
- amortization 分期偿还;折旧;(均摊)
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- pessimal 最差的;最坏的
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- Incorporating I/O: Overlap. Basic idea is to treat each CPU burst(rather than the whole job) as a job, so that the job is divided into parts. This enables the scheduler to choose another job to run when the job is doing IO
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- Multi-level Feedback Queue (MLFQ)
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- Workload: a mix of interactive jobs that are short-running, and some longer-running “CPU-bound” jobs
- Basic rules: each job assigned to a priority level and MLFQ decides which job to run by priority. In this scheme, a job with higher priority runs first, and jobs with the same priority RR. ((642ecc9e-b28b-4951-aaf6-1191e867b34f))
- Change priority: set priority based on its observed behavior, for example, keep high priority for interactive jobs which frequently relinquish CPU.
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- one of the major goals of the algorithm: It doesnt know whether a job will be short or job, it first assumes it might be short, thus giving high priority. If it actually is short, it will run quickly and complete; if it is not, it will slowly move down the queues, and thus soon prove itself to be a long-running more batch-like process.
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- Approximates SJF
- Basic rules for MLFQ:
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- Rule 1: If Priority(A) > Priority(B), A runs (B doesnt).
- Rule 2: If Priority(A) = Priority(B), A & B run in RR.
- Problematic priority adjustment algorithm
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- Rule 3: When a job enters the system, it is placed at the highest priority (the topmost queue).
- Rule 4a: If a job uses up an entire time slice while running, its priority is reduced.
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Rule 4b: If a job gives up the CPU before the time slice is up, it stays at the same priority level.
- Problem 1: starvation.
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If there are too many interactive jobs *occupying the CPU in combination*, then the long jobs will never get to run
- Problem 2: game the scheduler.
For example, a CPU-bound job intentionally issue a trivial IO request just before its time slice is over, so that it will not be moved to lower queue although it should be.
- Problem 3: program behavior change.
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- The Priority Boost
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- Rule 5: After some time period `S`, move all the jobs in the system to the topmost queue.
- This solves the problem of ((642ecd3f-c076-42f1-ba24-7f363eba9e14)) and ((642ed383-c27c-401c-b77f-66e7ec60ba5e)). Since the priorities will get recalculated periodically, the scheduler re-learns the jobs' traits which may have changed.
- However, how to choose such `S` is a problem.
- voo-doo constants
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- Better Accounting
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- Rule 4: Once a job uses up its time allotment at a given level (regardless of how many times it has given up the CPU), its priority is reduced.
- This substitutes ((642ecd25-c824-4dcd-9a6a-43a717dd5b1e))
- parameterized scheduler
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- relinquish 交出,让给;放弃
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- culprit 犯人,罪犯;被控犯罪的人
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- Proportional-share(fair-share) scheduler
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- Instead of optimizing for turnaround or response time, the scheduler tries to guarantee that <u>each job obtain a certain percentage of CPU time</u>.
- tickets: represent the share of a resource that a process should receive
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- ticket currency: kind of user interface. Users allocate tickets freely to their own processes, and the system converts user tickets to global tickets according to some kind of exchange rate, in order to achieve fairness between users.
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- ticket transfer: kind of cooperation between processes. A process temporarily hands off its tickets to another process.
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- ticket inflation: another kind of cooperation. A process can temporarily raise or lower the number of tickets it owns, to indicate that it needs CPU.
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- Lottery scheduling
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- Scheduler **randomly** pick a winning ticket(i.e. number the tickets 1-N, and do a range random), the job which holdes this ticket runs. The more tickets a job holds, the higher chance it is chosen to run. Thus the CPU is shared by proportion, probabilistically.
- Lottery Fairness Study: When the job length is not very long, unfairness can be quite severe. Only as the jobs run for a significant number of time slices does the lottery scheduler approach the desired outcome.
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- Stride scheduling: a **deterministic** fair-share scheduler.
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- Each job has a *stride*, which is inverse in proportion to the tickets it has (conceptually like reciprocal).
Every time a process runs, increase its counter(called its *pass* value) by 1 stride.
The scheduler picks the process with lowest pass value to run
- Why still lottery scheduling? No global states! Thus much easier to implement.
- Problem: How to determine how many tickets to assign to your processes with different purposes and traits? MLFQ does this automatically, but here nobody does this.
- Completely Fair Scheduler (CFS)
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- Goal: to fairly divide a CPU evenly among all competing processes.
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- virtual runtime: As each process runs, it accumulates `vruntime`. And the scheduler picks the lowest one to run.
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- For blocked processes: need to alter `vruntime` of a job when it wakes up. Otherwise, its `vruntime` would be too small thus breaking fairness. CFS chooses the minimum `vruntime` in the running process table.
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- Parameters
- `sched_latency`: when running, scheduler divides this value by the number of running processes `n`. The result is used as the time slice for each process. This simple approach is adaptive to dynamic change of running processes.
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- `min_granularity`: minimum of time slice, to avoid reducing performance too much
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- Weighting (Niceness): every process is assigned to a `nice` value ranging from -20 to 19. The smaller nice value, the higher priority. A nice value is mapped to some `weight` through a carefully built table.
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- Given the weight, the time slice can be calculated, and the calculation for `vruntime` needs adaptation to guarantee the time slice.
$$ time\_slice_k = \frac{weight_k}{\sum weight_i}\cdot sched\_latency \\ vruntime_i = vruntime_i + \frac{weight_0}{weight_i} \cdot runtime_i$$
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- hallmark 特征;特点:
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- panacea 万能药
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- remedy 补救方法
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- proliferation 涌现;增殖
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- Problems with multiple processors
- cache coherence: basically, hardware handles this
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- Synchronization: though locks ensure correctness, performance is harmed
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- Cache Affinity: cache may still keep some of the process's state, so this may be faster if the process runs on the same CPU next time, in that there is no need to load state from memory.
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- Single-Queue Multiprocessor Scheduling(SQMS)
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- Simply use the same policy as we do in the single processor condition, and pick maybe more than one best jobs to run.
- Problem 1: lack of scalability. Since it is a single global queue, there will be a lot of contention on the same lock, thus greatly reducing the performance.
- Problem 2: cache affinity. If the scheduler simply feed processes to CPU by order, the jobs will bounce around from CPU to CPU. Complex affinity mechanism is needed to try to make it more likely that process will continue to run on the same CPU.
- Multi-Queue Multiprocessor Scheduling (MQMS).
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- Consists of multiple independent queues following some particular policy. Avoid problems of sharing and synchronization.
- More scalable: when number of CPUs grows, add more queues.
- Better cache affinity: jobs in the same queue stay in the same CPU
- Problem: load imbalance. The jobs in the queue with fewer jobs get more CPU share than those in the queue with more jobs. Or even worse, some CPUs are IDLE. (一核有难,七核围观)
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- Migration: the obvious solution to load imbalance, is to migrate some jobs from one CPU to another. Sometimes, we need to keep switching jobs, in such case that Q1 has 1 job and Q2 has 2 jobs. You may want to keep moving the third job from one CPU to another, to balance load.
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- Work stealing: source queue(low on jobs) occasionally peek at other queues to see whether it is a good idea to move some jobs to help balance load.
- sinister 危险的, 不吉祥的
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- insidious 隐伏的,潜在的,阴险的
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- dissertation 专题论文, 学位论文
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- daunting 使人畏缩的;使人气馁的;
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- undertake 承担;从事;负责
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- Linux Multiprocessor Schedulers: 3 different schedulers. CFS and O(1) are MQMS, while BFS is SQMS based on EEVDF.
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- super-linear speedup: Sometimes a speedup of more than A when using A processors is observed in parallel computing. One possible reason for this is that, these CPUs offers larger cache size all together. If properly designed, memory access could even be eliminated, thus greatly improving performance.
hl-page:: 141
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id:: 642faf44-5876-46b3-acb4-b786f390716f
hl-color:: yellow
- paranoid
ls-type:: annotation
hl-page:: 142
hl-color:: green
id:: 642fb2f2-b9a4-48f4-b847-2b30d632db32
- rage
ls-type:: annotation
hl-page:: 143
hl-color:: green
id:: 642fb3d2-e51f-4b9b-8a79-dea9d8e6a7b0
- inundated
ls-type:: annotation
hl-page:: 144
hl-color:: green
id:: 642fb4c0-5c56-44e9-aac6-396212698309
- errant
ls-type:: annotation
hl-page:: 145
hl-color:: green
id:: 642fb51d-f82c-40b4-82ad-878ee13a2264
- darned
ls-type:: annotation
hl-page:: 146
hl-color:: green
id:: 642fb54e-23c4-4667-955d-ad09fbbf6268
- pesky
ls-type:: annotation
hl-page:: 148
hl-color:: green
id:: 642fb9df-d4c2-4b75-9341-e9ea53d42dcc
- Address space: process's view of memory, the abstraction that the OS provides to the running program. When OS does this, we say it is **virtualizing memory**.
hl-page:: 148
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id:: 642fbad1-cda0-4ef4-97f7-38c3519042f4
hl-color:: yellow
- Goal: transparency, efficiency and protection
- alas
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hl-page:: 149
hl-color:: green
id:: 642fbb24-877c-4c90-9e13-4e613e2e23d3
- tandem
ls-type:: annotation
hl-page:: 150
hl-color:: green
id:: 642fbb6e-9a9a-4ff6-92ea-b36903da1b88
- stipulate
ls-type:: annotation
hl-page:: 150
hl-color:: green
id:: 642fbc3d-d70b-4adb-bb0b-6b7038480589
- scribble
ls-type:: annotation
hl-page:: 159
hl-color:: green
id:: 642fbfcb-7327-44b8-9b25-308728264a81
- Memory API: this interlude chapter talks about memory allocation interfaces like `malloc` and `free`. Quite trivial for proficient C programmers.
hl-page:: 155
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id:: 642fc139-afc3-4ba4-ad01-4cc33d9e535c
hl-color:: yellow
- hardware-based address translation
ls-type:: annotation
hl-page:: 167
hl-color:: yellow
id:: 642fd36e-c0a7-4ead-a3a8-f085d6576229
- Assumptions
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hl-page:: 167
hl-color:: yellow
id:: 642fc48b-e5bf-4043-b042-218445c2b714
- Address space mapped to contiguous physical memory
- Address space can be totally held in physical memory(no too big)
- Each address space is the same size.
- Dynamic (Hardware-based) Relocation
ls-type:: annotation
hl-page:: 170
hl-color:: yellow
id:: 642fc65f-1147-459c-8906-5ffca38b1e66
- Software-based(static) relocation: program loader rewrites the to-be-loaded program's addresses according to its target offset in physical memory. The most important problem with this approach is that, protection can hardly be enforced.
hl-page:: 171
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id:: 642fc677-cbd4-47fd-bd90-3ed0cd56cc5b
hl-color:: yellow
- base-and-bounds: 2 registers for *each* CPU, used for determining the physical location of the address space.
- Before running, program is compiled as if it is loaded at address 0x00000000.
On startup, OS decide where to put the program and set `base` register.
When running, CPU translates process's memory reference(virtual address -> physical address) and issue request to RAM using physical address. `physcal address = virtual address + base`
- `bounds` register is there to help with protection, hardware checks whether the translated address exceeds the bound
- Dynamic Relocation: Hardware Requirements
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hl-page:: 174
hl-color:: yellow
id:: 642fd1ed-22a9-4443-b02f-bc35fe42e50b
- Dynamic Relocation: Operating System Responsibilities. In addition to the LDE introduced in CPU virtualization, a little more work needs to be done, like base/bounds register save/restore, memory allocation and deallocation.
hl-page:: 175
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id:: 642fd1f4-d573-4dbc-9e48-02adacc69e5e
hl-color:: yellow
- The stuff is not difficult to figure out on your own, so, why bother keeping notes on it?
- Problem: Internal fragmentation. Since the address space has fixed size in Dynamic Relocation, the used part of memory between stack and heap is wasted.
hl-page:: 178
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id:: 642fd2f3-e05f-453c-8286-15e7807e8e97
hl-color:: yellow
- Programs may want larger address space(though not fully used)
- Memory Management Unit (MMU): the part of the processor that helps with address translation.
hl-page:: 172
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id:: 642fced7-c809-4d1e-bddb-da6474e851b8
hl-color:: yellow
- havoc
ls-type:: annotation
hl-page:: 173
hl-color:: green
id:: 642fcf85-6cfb-4eb9-aef2-ddcef7027b70
- wreak
ls-type:: annotation
hl-page:: 173
hl-color:: green
id:: 642fcf90-3133-4002-b986-4fd8157ab707
- ghastly
ls-type:: annotation
hl-page:: 174
hl-color:: green
id:: 642fcfa9-c026-4885-9f50-029ca80ce148
- juncture
ls-type:: annotation
hl-page:: 174
hl-color:: green
id:: 642fcff1-ae71-4756-9847-5ab85c41be06
- oblivious
ls-type:: annotation
hl-page:: 175
hl-color:: green
id:: 642fd071-db9c-4f0e-886f-b6ba3e5e4f7d
- Segmentation: Generalized Base/Bounds
ls-type:: annotation
hl-page:: 181
hl-color:: yellow
id:: 642fd5c3-30f9-4770-8ec5-09555d21c4ab
- Divide the address space into contiguous segments, and **the address space as a whole is no more contiguous in physical memory**.
- A base and bounds pair per logical segment of the address space. Place each one of those segments in different parts of physical memory, and thus avoid filling physical memory with unused virtual address space. Conforming to this, MMU should add some registers.
- Selecting segment: which segment does a virtual address refer to?
- Explicit method: use the top few bits of the virtual address as segment selector, and the rest as in-segment offset.
- Problem 1: bit wasted, for example, we have only 3 segments, but we have to use 2-bits which provides 4.
- Problem2: limits the use of the virtual address space. Because the top bits is taken away to represent segments, the maximum of a segment is reduced.
- implicit approach, the hardware determines the segment by noticing how the address was formed. For example, PC -> code segment, SP -> stack segment
hl-page:: 185
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id:: 642fda54-4040-4d9b-ab00-13523aeb54c4
hl-color:: yellow
- Stack segment support: stack grows backwards. First, add a field to hardware to indicate a segment grows positive or not. When proceeding a negative growing segment, the physical address is calculated as `PA = VA[offset] - MAX_SEG_SIZE + base`, signed operation
hl-page:: 186
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id:: 642fdca4-df4b-4515-8e96-ef4b05a7bb62
hl-color:: yellow
- A real world example for this is the E(Expand-Down) bit in x86's segment descriptor.
- The reason why design such a weird mechanism is explained here: [osdev-expand_down](https://wiki.osdev.org/Expand_Down#Expand_Down). In short, programs may require the a segment to grow its size when the initially allocated segment is too small.
- Support for Sharing: protection bits.
hl-page:: 187
ls-type:: annotation
id:: 642fe0dc-7d4b-41af-a136-69164ee77ab4
hl-color:: yellow
- Attach several protection bits to Segment Register. For example, by setting code segment to read-only, you can safely share the segment across processes, thus saving the memory to hold a copy of code when a program creates many processes.
- Problem 1: variable-sized segments cause external fragments by chopping free memory into odd-sized pieces
- Problem 2: not flexible enough. What if we want a large enough but sparsely-allocated heap(the heap segment could be very large but wastefully used)?

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@ -830,9 +830,200 @@ file-path:: ../assets/ostep_1680491762166_0.pdf
ls-type:: annotation
id:: 643040e1-7784-424c-9096-d3e22fddbf9e
hl-color:: yellow
- Page: fixed-sized memory unit in address space
- Page: <u>fixed-sized memory</u> unit in address space
hl-page:: 211
ls-type:: annotation
id:: 643044ff-fd8a-45fe-b564-f93683425ab3
hl-color:: yellow
Page frame: physical memory as an array of fixed-sized slots
- Avoid external fragmentation by dividing fixed-sized units instead of variable-sized segments
- page table: store address translations for each of the virtual pages of the address space
hl-page:: 213
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id:: 6430bfab-9ff7-44cb-ad64-c422796cad71
hl-color:: yellow
- per-process data structure
ls-type:: annotation
hl-page:: 213
hl-color:: yellow
id:: 6430c091-bc57-4930-bac1-9e1762b7c3e1
- Virtual address splits into two components: the virtual page number (VPN), and the offset
hl-page:: 213
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id:: 6430c0a5-6e88-455c-8a62-ab6e60fca98f
hl-color:: yellow
- physical frame number (PFN)
ls-type:: annotation
hl-page:: 214
hl-color:: yellow
id:: 6430c173-13a7-4bce-9d60-3f1d2a7fb3f4
- Page table entry (PTE): hold the physical translation plus any other useful stuff like valid bit, protection bits, present bit, dirty bit, accessed bit
hl-page:: 215
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id:: 6430c665-8485-46e6-810a-b2d62b01cf66
hl-color:: yellow
- Linear Page Table: just an Array. The OS indexes the array by the VPN, and looks up the PTE at that index in order to find the desired PFN.
hl-page:: 216
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id:: 6430cb48-d435-4bb4-807e-402ee20d0a98
hl-color:: yellow
- Figure 18.6: Accessing Memory With Paging(Initial Version)
hl-page:: 219
ls-type:: annotation
id:: 6430cac6-63c8-4ab7-a402-49097ef24154
hl-color:: yellow
Extra memory references are costly
- beguile 哄骗(某人做某事);诱骗;吸引(某人);
ls-type:: annotation
hl-page:: 215
hl-color:: green
id:: 6430c18b-cd3f-400d-8414-3b780ed1b4ce
- gruesome 可怕的;阴森的
ls-type:: annotation
hl-page:: 216
hl-color:: green
id:: 6430c51c-591b-4739-921a-ea9e0abbfbaa
- judicious 审慎而明智的
hl-page:: 217
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id:: 6430c5f3-3ce3-486d-b7ee-832673fa4d4d
hl-color:: green
- Translation-Lookaside Buffer(TLB)
hl-page:: 226
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id:: 6430cc79-5b7c-4cc3-9d7e-39a44a333c77
hl-color:: yellow
- **a hardware cache** of popular virtual-to-physical address translations. Due to temporal and spatial locality, TLB works quite well.
- Figure 19.1: TLB Control Flow Algorithm: hit and miss
hl-page:: 227
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id:: 6430ccdf-09c2-42e2-aa80-7859bb320b91
hl-color:: yellow
- TLB Miss handler
hl-page:: 231
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id:: 6430d596-d805-4bc8-a3a7-219d6927a503
hl-color:: yellow
- hardware-managed TLBs: transparent to OS, if page table relative stuff is properly set.
hl-page:: 231
ls-type:: annotation
id:: 6430d5ac-5021-4b2e-a5d7-e3e4988a4a89
hl-color:: yellow
- software-managed TLB: hardware raises an exception and goes to a trap handler.
hl-page:: 231
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id:: 6430d5be-7a59-4ef2-9ba3-94e8298f4e47
hl-color:: yellow
Then OS takes over, trap handler code looks up page table, and use privileged instructions to update TLB.
- Special trap: Syscall resumes to the next instruction(like a procedure call); TLB trap resumes to the instruction caused the trap(retry, this time should have a TLB hit).
- Infinite chain of TLB misses: what if the trap handler causes a TLB miss? Reserve some unmapped memory or some always-valid TLB entries to avoid such terrible situation.
id:: 6430d9b4-c202-486f-9943-bd5c6d1310a8
- Fully-associative TLB: `VPN | PFN | other bits`.
hl-page:: 233
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id:: 6430db45-ace1-4bcf-9672-b929c8720bf2
hl-color:: yellow
- "Fully-associative" means no limit on the relation between VPN and PFN, and the hardware lookup can be performed in parallel.
- Other bits include some bits from PTE, and a valid bit indicating whether the *translation* is valid(not about the page), which has different meaning from the valid bit in PTE.
- TLB and Context Switch: page table is ((6430c091-bc57-4930-bac1-9e1762b7c3e1)).
Conflicts show up when the same VPN is mapped to different PFNs. This is quite common because all processes' have similar address space layout.
- Flush TLB on context switches by some kind of flush instruction(software TLB) or changing the PTBR(hardware TLB, e.g. x86's CR3). Simple but wasteful.
- Add an address space identifier(ASID) field to TLB entry, which identifies different processes and allows them to share TLB without flushing on context switch.
- Replacement Policy: Random, LRU
hl-page:: 236
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id:: 6430e32c-f334-4274-a56f-03a793d05df9
hl-color:: yellow
- MIPS R4k TLB Entry Layout
- G-global bit, the entry is globally-shared among processes, thus shadowing the ASID field
- C-coherence bit, deals with process number that exceeds ASID capability
- D-dirty bit; V-valid bit
- Page mask, large page support
- CP0-wired register: tell the hardware how many slots of the TLB to reserve for the OS to solve this: ((6430d9b4-c202-486f-9943-bd5c6d1310a8))
- Problems
hl-page:: 238
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hl-color:: yellow
- Exceeding the TLB coverage: too many pages are accessed in a short period of time. Maybe we need some large pages
- CPU pipeline bottleneck: physically-indexed cache requires address translation before cache lookup, causing high delay. Solutions like virtually-indexed cache, VIPT
- premise 前提;假定
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hl-page:: 228
hl-color:: green
id:: 6430d370-e99b-4443-bd55-3aa5b941b2c4
- sneaky 悄悄的;偷偷摸摸的;鬼鬼祟祟的
ls-type:: annotation
hl-page:: 231
hl-color:: green
id:: 6430d54f-9837-4f82-b4b0-13ab387c9a7a
- TLB Size Measurement: loop through an large array and access the elements by page stride. Measure the time cost by repeating this for millions of time.
hl-page:: 240
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id:: 6430e720-f62a-4094-9ecf-3a6d47540d34
hl-color:: yellow
- page tables are too big and thus consume too much memory.
ls-type:: annotation
hl-page:: 242
hl-color:: yellow
id:: 6431070d-a42a-4403-b6c5-bab956d5608f
- Bigger Pages
hl-page:: 242
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id:: 643106f5-b280-4331-be8e-70f8c34c3c28
hl-color:: yellow
- Reduce page table size and TLB pressure, though internal fragmentation becomes the major problem.
- Suitable for professional software which frequently uses memory-consuming data structures like database.
- Hybrid approach: Segments with paging
hl-page:: 245
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id:: 64310894-f97b-4d29-b477-75d45b1af812
hl-color:: yellow
- Each segment, which is *bounded*, have a page table which stores a few pages that are in use. We don't need to cover the whole address space where many PTEs are just invalid.
- The original base register now points to the *physical address of the page table*; and the bounds register indicates the end of the page table for this segment.
- Virtual address is accordingly split into 3 parts `Segment | VPN | Offset`. And the lookup procedure also needs adaptation: `PTE_Addr = Base[SegNo] + (VPN * sizeof(PTE))`
- Problem: inflexible due to segmentation; external fragmentation because page tables are still variable-sized(though other part of memory is fixed-sized); complexity.
- multi-level page table
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hl-page:: 246
hl-color:: yellow
id:: 64310f59-4581-45b8-9b56-9e0ef04ec513
- turns the linear page table into something like a tree, the detailed working principles are quite easy thus ignored here, or look at the link below as a review
- Figure 20.6: Multi-level Page Table Control Flow
ls-type:: annotation
hl-page:: 253
hl-color:: yellow
id:: 64318f9a-b732-4bab-9a1e-73519fac8059
- Page directory and Page Directory Entry(PDE)
- Advantages: Page table size is in proportion to address space usage; Easy to manage, contiguous physical memory is not required for page table(in contrast to Segment + Paging)
- Problems: Complexity; More penalty at TLB miss (need to access RAM more than once)
- inverted page table
hl-page:: 254
ls-type:: annotation
id:: 64319047-2ffb-4355-9aab-82ea232375aa
hl-color:: yellow
- A system-wide single page table instead of per-process page table. Inverted page table has an entry for each physical page, which tells us which process is using this page, and which virtual page is mapped to this physical page.
- The translation process is to search this table by VA and PID to find the correct entry. Maybe build a hash table to speed up this search.
- Support large address spaces: stash away portions of address spaces that currently aren't in great demand.
hl-page:: 257
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id:: 643196c4-91fa-43c2-832e-7080b0617fe5
hl-color:: yellow
- Swap space
hl-page:: 258
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id:: 64319715-78ae-4efe-bab1-def007ee8e78
hl-color:: yellow
- Reserve some space on disk for moving pages back and forth, and the OS needs to remember the disk address of a given page.
- swap space is not the only on-disk location for swapping, e.g. program binary loading, not necessarily load the whole code segment at first
hl-page:: 258
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id:: 64319809-1dbe-48dc-a4e4-7e14062d42c5
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-
-
- chinery
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hl-page:: 259
hl-color:: green
id:: 64319857-9885-49e0-9e51-c974f0b6b038